#[doc = "Register `LSADC_CTRL0` reader"]
pub struct R(crate::R<LSADC_CTRL0_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<LSADC_CTRL0_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<LSADC_CTRL0_SPEC>> for R {
    fn from(reader: crate::R<LSADC_CTRL0_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `LSADC_CTRL0` writer"]
pub struct W(crate::W<LSADC_CTRL0_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<LSADC_CTRL0_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<LSADC_CTRL0_SPEC>> for W {
    fn from(writer: crate::W<LSADC_CTRL0_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Analog power control.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum CUR_BAIS_A {
    #[doc = "0: automatic control."]
    AUTO = 0,
    #[doc = "1: manual control, AVDD = 1.8 V."]
    MANUAL_1P8 = 1,
    #[doc = "2: manual control, AVDD = 3.3 V."]
    MANUAL_3P3 = 2,
}
impl From<CUR_BAIS_A> for u8 {
    #[inline(always)]
    fn from(variant: CUR_BAIS_A) -> Self {
        variant as _
    }
}
#[doc = "Field `cur_bais` reader - Analog power control."]
pub struct CUR_BAIS_R(crate::FieldReader<u8, CUR_BAIS_A>);
impl CUR_BAIS_R {
    pub(crate) fn new(bits: u8) -> Self {
        CUR_BAIS_R(crate::FieldReader::new(bits))
    }
    #[doc = r"Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> crate::Variant<u8, CUR_BAIS_A> {
        use crate::Variant::*;
        match self.bits {
            0 => Val(CUR_BAIS_A::AUTO),
            1 => Val(CUR_BAIS_A::MANUAL_1P8),
            2 => Val(CUR_BAIS_A::MANUAL_3P3),
            i => Res(i),
        }
    }
    #[doc = "Checks if the value of the field is `AUTO`"]
    #[inline(always)]
    pub fn is_auto(&self) -> bool {
        **self == CUR_BAIS_A::AUTO
    }
    #[doc = "Checks if the value of the field is `MANUAL_1P8`"]
    #[inline(always)]
    pub fn is_manual_1p8(&self) -> bool {
        **self == CUR_BAIS_A::MANUAL_1P8
    }
    #[doc = "Checks if the value of the field is `MANUAL_3P3`"]
    #[inline(always)]
    pub fn is_manual_3p3(&self) -> bool {
        **self == CUR_BAIS_A::MANUAL_3P3
    }
}
impl core::ops::Deref for CUR_BAIS_R {
    type Target = crate::FieldReader<u8, CUR_BAIS_A>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `cur_bais` writer - Analog power control."]
pub struct CUR_BAIS_W<'a> {
    w: &'a mut W,
}
impl<'a> CUR_BAIS_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CUR_BAIS_A) -> &'a mut W {
        unsafe { self.bits(variant.into()) }
    }
    #[doc = "automatic control."]
    #[inline(always)]
    pub fn auto(self) -> &'a mut W {
        self.variant(CUR_BAIS_A::AUTO)
    }
    #[doc = "manual control, AVDD = 1.8 V."]
    #[inline(always)]
    pub fn manual_1p8(self) -> &'a mut W {
        self.variant(CUR_BAIS_A::MANUAL_1P8)
    }
    #[doc = "manual control, AVDD = 3.3 V."]
    #[inline(always)]
    pub fn manual_3p3(self) -> &'a mut W {
        self.variant(CUR_BAIS_A::MANUAL_3P3)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
        self.w
    }
}
#[doc = "Field `rst_cnt` reader - Count time from the reset (RST) to the start of the conversion."]
pub struct RST_CNT_R(crate::FieldReader<u16, u16>);
impl RST_CNT_R {
    pub(crate) fn new(bits: u16) -> Self {
        RST_CNT_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for RST_CNT_R {
    type Target = crate::FieldReader<u16, u16>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `rst_cnt` writer - Count time from the reset (RST) to the start of the conversion."]
pub struct RST_CNT_W<'a> {
    w: &'a mut W,
}
impl<'a> RST_CNT_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0fff << 12)) | (((value as u32) & 0x0fff) << 12);
        self.w
    }
}
#[doc = "Average algorithm mode select.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum EQU_MODEL_SEL_A {
    #[doc = "0: 1-time average (that is, not average)."]
    MODEL_1 = 0,
    #[doc = "1: 2-time average algorithm."]
    MODEL_2 = 1,
    #[doc = "2: 4-time average algorithm."]
    MODEL_4 = 2,
    #[doc = "3: 8-time average algorithm."]
    MODEL_8 = 3,
}
impl From<EQU_MODEL_SEL_A> for u8 {
    #[inline(always)]
    fn from(variant: EQU_MODEL_SEL_A) -> Self {
        variant as _
    }
}
#[doc = "Field `equ_model_sel` reader - Average algorithm mode select."]
pub struct EQU_MODEL_SEL_R(crate::FieldReader<u8, EQU_MODEL_SEL_A>);
impl EQU_MODEL_SEL_R {
    pub(crate) fn new(bits: u8) -> Self {
        EQU_MODEL_SEL_R(crate::FieldReader::new(bits))
    }
    #[doc = r"Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> EQU_MODEL_SEL_A {
        match self.bits {
            0 => EQU_MODEL_SEL_A::MODEL_1,
            1 => EQU_MODEL_SEL_A::MODEL_2,
            2 => EQU_MODEL_SEL_A::MODEL_4,
            3 => EQU_MODEL_SEL_A::MODEL_8,
            _ => unreachable!(),
        }
    }
    #[doc = "Checks if the value of the field is `MODEL_1`"]
    #[inline(always)]
    pub fn is_model_1(&self) -> bool {
        **self == EQU_MODEL_SEL_A::MODEL_1
    }
    #[doc = "Checks if the value of the field is `MODEL_2`"]
    #[inline(always)]
    pub fn is_model_2(&self) -> bool {
        **self == EQU_MODEL_SEL_A::MODEL_2
    }
    #[doc = "Checks if the value of the field is `MODEL_4`"]
    #[inline(always)]
    pub fn is_model_4(&self) -> bool {
        **self == EQU_MODEL_SEL_A::MODEL_4
    }
    #[doc = "Checks if the value of the field is `MODEL_8`"]
    #[inline(always)]
    pub fn is_model_8(&self) -> bool {
        **self == EQU_MODEL_SEL_A::MODEL_8
    }
}
impl core::ops::Deref for EQU_MODEL_SEL_R {
    type Target = crate::FieldReader<u8, EQU_MODEL_SEL_A>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `equ_model_sel` writer - Average algorithm mode select."]
pub struct EQU_MODEL_SEL_W<'a> {
    w: &'a mut W,
}
impl<'a> EQU_MODEL_SEL_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: EQU_MODEL_SEL_A) -> &'a mut W {
        self.bits(variant.into())
    }
    #[doc = "1-time average (that is, not average)."]
    #[inline(always)]
    pub fn model_1(self) -> &'a mut W {
        self.variant(EQU_MODEL_SEL_A::MODEL_1)
    }
    #[doc = "2-time average algorithm."]
    #[inline(always)]
    pub fn model_2(self) -> &'a mut W {
        self.variant(EQU_MODEL_SEL_A::MODEL_2)
    }
    #[doc = "4-time average algorithm."]
    #[inline(always)]
    pub fn model_4(self) -> &'a mut W {
        self.variant(EQU_MODEL_SEL_A::MODEL_4)
    }
    #[doc = "8-time average algorithm."]
    #[inline(always)]
    pub fn model_8(self) -> &'a mut W {
        self.variant(EQU_MODEL_SEL_A::MODEL_8)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
        self.w
    }
}
#[doc = "Field `ch_vld` reader - Whether the channel is valid.bit\\[0\\]–bit\\[7\\]
correspond to channels A–H, respectively"]
pub struct CH_VLD_R(crate::FieldReader<u8, u8>);
impl CH_VLD_R {
    pub(crate) fn new(bits: u8) -> Self {
        CH_VLD_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for CH_VLD_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `ch_vld` writer - Whether the channel is valid.bit\\[0\\]–bit\\[7\\]
correspond to channels A–H, respectively"]
pub struct CH_VLD_W<'a> {
    w: &'a mut W,
}
impl<'a> CH_VLD_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
        self.w
    }
}
impl R {
    #[doc = "Bits 24:25 - Analog power control."]
    #[inline(always)]
    pub fn cur_bais(&self) -> CUR_BAIS_R {
        CUR_BAIS_R::new(((self.bits >> 24) & 0x03) as u8)
    }
    #[doc = "Bits 12:23 - Count time from the reset (RST) to the start of the conversion."]
    #[inline(always)]
    pub fn rst_cnt(&self) -> RST_CNT_R {
        RST_CNT_R::new(((self.bits >> 12) & 0x0fff) as u16)
    }
    #[doc = "Bits 8:9 - Average algorithm mode select."]
    #[inline(always)]
    pub fn equ_model_sel(&self) -> EQU_MODEL_SEL_R {
        EQU_MODEL_SEL_R::new(((self.bits >> 8) & 0x03) as u8)
    }
    #[doc = "Bits 0:7 - Whether the channel is valid.bit\\[0\\]–bit\\[7\\]
correspond to channels A–H, respectively"]
    #[inline(always)]
    pub fn ch_vld(&self) -> CH_VLD_R {
        CH_VLD_R::new((self.bits & 0xff) as u8)
    }
}
impl W {
    #[doc = "Bits 24:25 - Analog power control."]
    #[inline(always)]
    pub fn cur_bais(&mut self) -> CUR_BAIS_W {
        CUR_BAIS_W { w: self }
    }
    #[doc = "Bits 12:23 - Count time from the reset (RST) to the start of the conversion."]
    #[inline(always)]
    pub fn rst_cnt(&mut self) -> RST_CNT_W {
        RST_CNT_W { w: self }
    }
    #[doc = "Bits 8:9 - Average algorithm mode select."]
    #[inline(always)]
    pub fn equ_model_sel(&mut self) -> EQU_MODEL_SEL_W {
        EQU_MODEL_SEL_W { w: self }
    }
    #[doc = "Bits 0:7 - Whether the channel is valid.bit\\[0\\]–bit\\[7\\]
correspond to channels A–H, respectively"]
    #[inline(always)]
    pub fn ch_vld(&mut self) -> CH_VLD_W {
        CH_VLD_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "LSADC_CTRL0 is the ADC control register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lsadc_ctrl0](index.html) module"]
pub struct LSADC_CTRL0_SPEC;
impl crate::RegisterSpec for LSADC_CTRL0_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [lsadc_ctrl0::R](R) reader structure"]
impl crate::Readable for LSADC_CTRL0_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [lsadc_ctrl0::W](W) writer structure"]
impl crate::Writable for LSADC_CTRL0_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets LSADC_CTRL0 to value 0xf000"]
impl crate::Resettable for LSADC_CTRL0_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0xf000
    }
}
